Development of In-Memory Computing Device Using Positive Feedback Field Effect Transistor Based on NAND Flash Array

Abstract

In this study, we propose a feedback field effect transistor (FBFET) in-memory computing device based on the string of NAND flash array. By combining the polysilicon-blocking oxide-silicon nitride-tunneling oxide-silicon (SONOS) cell structure and N+-P $^{-}$ -N $^{-}$ -P+ body doping structure of FBFET, the device is designed in a string structure. Our in-memory computing FBFET can perform Boolean logical operations by utilizing the threshold voltage modulation characteristics of the FBFET by adjusting the control gate voltage. Additionally, we present optimized hot carrier injection conditions tailored for the in-memory computing FBFET, enabling the successful writing of results for Boolean logic operations: OR, AND, NOR, NAND. These findings contribute a novel mechanism and direction for the field of in-memory computing research.