Y C Shih, F W Sun, L R Macdonald, B P Otis, R S Miyaoka, W McDougald, T K Lewellen
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引用次数: 18
Abstract
This work presents a row/column summing readout electronics for an 8×8 silicon photomultiplier array. The summation circuit greatly reduces the number of electronic channels, which is desirable for pursuing higher resolution positron emission tomography scanners. By using a degenerated common source topology in the summation circuit, more fan-in is possible and therefore a greater reduction in the number of electronic channels can be achieved. The timing signal is retrieved from a common anode, which allows the use of a single fast-sampling analog to digital converter (ADC) for the timing channel and slower, lower power ADCs for the 64 spatial channels. Preliminary results of one row summation of the 8×8 readout electronics exhibited FWHM energy resolution of 17.8% and 18.3% with and without multiplexing, respectively. The measured timing resolution is 2.9ns FWHM.