{"title":"A critical view on the real-world security of logic locking.","authors":"Susanne Engels, Max Hoffmann, Christof Paar","doi":"10.1007/s13389-022-00294-x","DOIUrl":null,"url":null,"abstract":"<p><p>With continuously shrinking feature sizes of integrated circuits, the vast majority of semiconductor companies have become <i>fabless</i>, outsourcing to foundries across the globe. This exposes the design industry to a number of threats, including piracy via IP-theft or unauthorized overproduction and subsequent reselling on the black market. One alleged solution for this problem is <i>logic locking</i>, where the genuine functionality of a chip is \"locked\" using a key only known to the designer. Solely with a correct key, the design works as intended. Since unlocking is handled by the designer only after production, an adversary in the supply chain should not be able to unlock overproduced chips. In this work, we focus on logic locking against the threat of overproduction. First, we survey existing locking schemes and characterize them by their handling of keys, before extracting similarities and differences in the employed attacker models. We then compare said models to the real-world capabilities of the primary adversary in overproduction-a malicious foundry. This comparison allows us to identify pitfalls in existing models and derive a more realistic attacker model. Then, we discuss how existing schemes hold up against the new attacker model. Our discussion highlights that several attacks beyond the usually employed SAT-based approaches are viable. Crucially, these attacks stem from the underlying structure of current logic locking approaches, which has never changed since its introduction in 2008. We conclude that logic locking, while being a promising approach, needs a fundamental rethinking to achieve real-world protection against overproduction.</p>","PeriodicalId":48508,"journal":{"name":"Journal of Cryptographic Engineering","volume":"12 3","pages":"229-244"},"PeriodicalIF":1.5000,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9464179/pdf/","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Cryptographic Engineering","FirstCategoryId":"94","ListUrlMain":"https://doi.org/10.1007/s13389-022-00294-x","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2022/8/20 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"COMPUTER SCIENCE, THEORY & METHODS","Score":null,"Total":0}
引用次数: 1
Abstract
With continuously shrinking feature sizes of integrated circuits, the vast majority of semiconductor companies have become fabless, outsourcing to foundries across the globe. This exposes the design industry to a number of threats, including piracy via IP-theft or unauthorized overproduction and subsequent reselling on the black market. One alleged solution for this problem is logic locking, where the genuine functionality of a chip is "locked" using a key only known to the designer. Solely with a correct key, the design works as intended. Since unlocking is handled by the designer only after production, an adversary in the supply chain should not be able to unlock overproduced chips. In this work, we focus on logic locking against the threat of overproduction. First, we survey existing locking schemes and characterize them by their handling of keys, before extracting similarities and differences in the employed attacker models. We then compare said models to the real-world capabilities of the primary adversary in overproduction-a malicious foundry. This comparison allows us to identify pitfalls in existing models and derive a more realistic attacker model. Then, we discuss how existing schemes hold up against the new attacker model. Our discussion highlights that several attacks beyond the usually employed SAT-based approaches are viable. Crucially, these attacks stem from the underlying structure of current logic locking approaches, which has never changed since its introduction in 2008. We conclude that logic locking, while being a promising approach, needs a fundamental rethinking to achieve real-world protection against overproduction.
期刊介绍:
The Journal of Cryptographic Engineering (JCEN) presents high-quality scientific research on architectures, algorithms, techniques, tools, implementations and applications in cryptographic engineering, including cryptographic hardware, cryptographic embedded systems, side-channel attacks and countermeasures, and embedded security. JCEN serves the academic and corporate R&D community interested in cryptographic hardware and embedded security.JCEN publishes essential research on broad and varied topics including:Public-key cryptography, secret-key cryptography and post-quantum cryptographyCryptographic implementations include cryptographic processors, physical unclonable functions, true and deterministic random number generators, efficient software and hardware architecturesAttacks on implementations and their countermeasures, such as side-channel attacks, fault attacks, hardware tampering and reverse engineering techniquesSecurity evaluation of real-world cryptographic systems, formal methods and verification tools for secure embedded design that offer provable security, and metrics for measuring securityApplications of state-of-the-art cryptography, such as IoTs, RFIDs, IP protection, cyber-physical systems composed of analog and digital components, automotive security and trusted computing