Multi-Objective Learning Automata for Design and Optimization a Two-Stage CMOS Operational Amplifier

N. S. Shahraki, S. Zahiri
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引用次数: 4

Abstract

In this paper, we propose an efficient approach to design optimization of analog circuits that is based on the reinforcement learning method. In this work, Multi-Objective Learning Automata (MOLA) is used to design a two-stage CMOS operational amplifier (op-amp) in 0.25μm technology. The aim is optimizing power consumption and area so as to achieve minimum Total Optimality Index (TOI), as a new and comprehensive proposed criterion, and also meet different design specifications such as DC gain, GainBand Width product (GBW), Phase Margin (PM), Slew Rate (SR), Common Mode Rejection Ratio (CMRR), Power Supply Rejection Ratio (PSRR), etc. The proposed MOLA contains several automata and each automaton is responsible for searching one dimension. The workability of the proposed approach is evaluated in comparison with the most well-known category of intelligent meta-heuristic Multi-Objective Optimization (MOO) methods such as Particle Swarm Optimization (PSO), Inclined Planes system Optimization (IPO), Gray Wolf Optimization (GWO) and Non-dominated Sorting Genetic Algorithm II (NSGA-II). The performance of the proposed MOLA is demonstrated in finding optimal Pareto fronts with two criteria Overall Non-dominated Vector Generation (ONVG) and Spacing (SP). In simulations, for the desired application, it has been shown through Computer-Aided Design (CAD) tool that MOLA-based solutions produce better results.
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基于多目标学习自动机的两级CMOS运算放大器设计与优化
在本文中,我们提出了一种基于强化学习方法的模拟电路优化设计的有效方法。本文利用多目标学习自动机(MOLA)设计了一种0.25μm工艺的两级CMOS运算放大器。其目的是优化功耗和面积,以达到最小的总最优指数(TOI),这是一个新的、全面的标准,同时满足不同的设计规范,如直流增益、增益带宽积(GBW)、相位裕度(PM)、回转率(SR)、共模抑制比(CMRR)、电源抑制比(PSRR)等。所提出的MOLA包含多个自动机,每个自动机负责搜索一个维度。将所提出的方法与最著名的智能元启发式多目标优化(MOO)方法进行比较,如粒子群优化(PSO)、倾斜平面系统优化(IPO)、灰狼优化(GWO)和非支配排序遗传算法II(NSGA-II)。所提出的MOLA在使用两个标准整体非支配向量生成(ONVG)和间距(SP)寻找最优Pareto前沿方面的性能得到了证明。在模拟中,对于所需的应用,已经通过计算机辅助设计(CAD)工具表明,基于MOLA的解决方案可以产生更好的结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Iranian Journal of Electrical and Electronic Engineering
Iranian Journal of Electrical and Electronic Engineering Engineering-Electrical and Electronic Engineering
CiteScore
1.70
自引率
0.00%
发文量
13
审稿时长
12 weeks
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