Automatic Balancing of “Arbiter” Physical Unclonable Function Paths

А. Ю. Шамына, А.А. Иванюк, A. Y. Shamyna, A. A. Ivaniuk
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Abstract

The features of building on the basis of programmable logic integrated circuits of “arbiter” physical unclonable functions (APUF) are considered. The problem of asymmetry of pairs of APUF paths is indicated and the negative impact of this phenomenon on their characteristics is noted. A time measuring system based on a ring oscillator scheme, which is used to analyze the time characteristics of APUF paths, is described. A method for automatic balancing of signal propagation delays through the APUF paths based on the calculation of the corrective value is proposed. The consistency of the proposed balancing technique is experimentally confirmed based on the improvement in the characteristics of the APUF after its implementation. A digital scheme of this technique is presented, which can form the basis for the development of a delay auto correction scheme through APUF paths with different levels of autonomy.
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“仲裁器”物理不可控制函数路径的自动平衡
考虑了在可编程逻辑集成电路基础上构建“仲裁器”物理不可克隆功能(APUF)的特点。指出了APUF路径对的不对称性问题,并指出了这种现象对其特性的负面影响。介绍了一种基于环形振荡器方案的时间测量系统,用于分析APUF路径的时间特性。提出了一种基于校正值计算的APUF路径信号传播延迟自动平衡方法。通过实验验证了该平衡技术的一致性,该平衡技术的实现改善了APUF的特性。提出了该技术的数字方案,为开发具有不同自治级别的APUF路径的延迟自动校正方案奠定了基础。
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审稿时长
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