Accelerating AI and Computer Vision for Satellite Pose Estimation on the Intel Myriad X Embedded SoC

IF 1.9 4区 计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE Microprocessors and Microsystems Pub Date : 2023-10-07 DOI:10.1016/j.micpro.2023.104947
Vasileios Leon , Panagiotis Minaidis , George Lentaris , Dimitrios Soudris
{"title":"Accelerating AI and Computer Vision for Satellite Pose Estimation on the Intel Myriad X Embedded SoC","authors":"Vasileios Leon ,&nbsp;Panagiotis Minaidis ,&nbsp;George Lentaris ,&nbsp;Dimitrios Soudris","doi":"10.1016/j.micpro.2023.104947","DOIUrl":null,"url":null,"abstract":"<div><p><span><span>The challenging deployment of Artificial Intelligence (AI) and </span>Computer Vision<span> (CV) algorithms at the edge pushes the community of embedded computing to examine heterogeneous System-on-Chips (SoCs). Such novel computing platforms provide increased diversity in interfaces, processors and storage, however, the efficient partitioning and mapping of AI/CV workloads still remains an open issue. In this context, the current paper develops a hybrid AI/CV system on Intel’s Movidius Myriad X, which is an heterogeneous Vision Processing Unit (VPU), for initializing and tracking the satellite’s pose in space missions. The space industry is among the communities examining alternative computing platforms to comply with the tight constraints of on-board data processing<span>, while it is also striving to adopt functionalities from the AI domain. At algorithmic level, we rely on the ResNet-50-based UrsoNet network along with a custom classical CV pipeline. For efficient acceleration, we exploit the SoC’s neural compute engine and 16 vector processors by combining multiple </span></span></span>parallelization<span> and low-level optimization techniques. The proposed single-chip, robust-estimation, and real-time solution delivers a throughput of up to 5 FPS for 1-MegaPixel RGB images within a limited power envelope of 2 W.</span></p></div>","PeriodicalId":49815,"journal":{"name":"Microprocessors and Microsystems","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2023-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microprocessors and Microsystems","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0141933123001916","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
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Abstract

The challenging deployment of Artificial Intelligence (AI) and Computer Vision (CV) algorithms at the edge pushes the community of embedded computing to examine heterogeneous System-on-Chips (SoCs). Such novel computing platforms provide increased diversity in interfaces, processors and storage, however, the efficient partitioning and mapping of AI/CV workloads still remains an open issue. In this context, the current paper develops a hybrid AI/CV system on Intel’s Movidius Myriad X, which is an heterogeneous Vision Processing Unit (VPU), for initializing and tracking the satellite’s pose in space missions. The space industry is among the communities examining alternative computing platforms to comply with the tight constraints of on-board data processing, while it is also striving to adopt functionalities from the AI domain. At algorithmic level, we rely on the ResNet-50-based UrsoNet network along with a custom classical CV pipeline. For efficient acceleration, we exploit the SoC’s neural compute engine and 16 vector processors by combining multiple parallelization and low-level optimization techniques. The proposed single-chip, robust-estimation, and real-time solution delivers a throughput of up to 5 FPS for 1-MegaPixel RGB images within a limited power envelope of 2 W.

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在Intel Myriad X嵌入式SoC上加速人工智能和计算机视觉卫星姿态估计
人工智能(AI)和计算机视觉(CV)算法在边缘的挑战性部署推动了嵌入式计算社区对异构片上系统(SoC)的研究。这种新颖的计算平台在接口、处理器和存储方面提供了更多的多样性,然而,AI/CV工作负载的有效划分和映射仍然是一个悬而未决的问题。在这种背景下,本文在英特尔的Movidius Myriad X上开发了一个混合AI/CV系统,这是一个异构的视觉处理单元(VPU),用于初始化和跟踪卫星在太空任务中的姿态。航天工业是研究替代计算平台以满足机载数据处理的严格限制的社区之一,同时也在努力采用人工智能领域的功能。在算法层面,我们依赖基于ResNet-50的UrsoNet网络以及自定义的经典CV管道。为了实现高效加速,我们结合了多种并行化和低级优化技术,利用了SoC的神经计算引擎和16个矢量处理器。所提出的单芯片、稳健估计和实时解决方案在2 W的有限功率范围内为1百万像素RGB图像提供了高达5 FPS的吞吐量。
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来源期刊
Microprocessors and Microsystems
Microprocessors and Microsystems 工程技术-工程:电子与电气
CiteScore
6.90
自引率
3.80%
发文量
204
审稿时长
172 days
期刊介绍: Microprocessors and Microsystems: Embedded Hardware Design (MICPRO) is a journal covering all design and architectural aspects related to embedded systems hardware. This includes different embedded system hardware platforms ranging from custom hardware via reconfigurable systems and application specific processors to general purpose embedded processors. Special emphasis is put on novel complex embedded architectures, such as systems on chip (SoC), systems on a programmable/reconfigurable chip (SoPC) and multi-processor systems on a chip (MPSoC), as well as, their memory and communication methods and structures, such as network-on-chip (NoC). Design automation of such systems including methodologies, techniques, flows and tools for their design, as well as, novel designs of hardware components fall within the scope of this journal. Novel cyber-physical applications that use embedded systems are also central in this journal. While software is not in the main focus of this journal, methods of hardware/software co-design, as well as, application restructuring and mapping to embedded hardware platforms, that consider interplay between software and hardware components with emphasis on hardware, are also in the journal scope.
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