Measurement of the local residual stress between fine metallic bumps in 3D flip chip structures

K. Nakahira, Hironori Tago, Takuya Sasaki, Ken Suzuki, H. Miura
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引用次数: 4

Abstract

The local thermal deformation of the chips mounted by area-arrayed fine bumps has increased drastically because of the decrease of the flexural rigidity of the thinned chips. In this paper, the dominant structural factors of the local residual stress in a silicon chip are investigated quantitatively based on the measurement of the local residual stress in a chip using stress sensor chips. The piezoresistive strain gauges were embedded in the sensor chips. The length of each gauge was 2 µm and a unit cell consisted of four gauges with different crystallographic directions. This alignment of strain gauges enables to measure the tensor component of three-dimensional stress fields separately. Test flip chip substrates were made by silicon chip on which the area-arrayed tin/copper bumps were electroplated. The width of a bump was fixed at 200 µm and the bump pitch was varied from 400 µm to 1,000 µm. The measured amplitude of the residual stress increased from about 30 MPa to 250 MPa. It was confirmed that both the material constant of underfill and the alignment structure of fine bumps are the dominant factors of the local deformation and stress of a silicon chip mounted on area-arrayed metallic bumps.
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三维倒装芯片结构中微细金属凸点间局部残余应力的测量
薄化后的微细凸点使芯片的弯曲刚度降低,导致芯片局部热变形急剧增加。本文利用应力传感器芯片对硅片局部残余应力进行测量,定量研究了硅片局部残余应力的主导结构因素。压阻式应变片嵌入传感器芯片中。每个量规的长度为2µm,一个晶胞由四个不同结晶方向的量规组成。应变片的这种排列可以单独测量三维应力场的张量分量。测试倒装片衬底是由硅片制成的,在硅片上电镀区域排列的锡/铜凸起。凸起宽度固定为200µm,凸起间距从400µm到1000µm不等。残余应力的测量幅值由30 MPa左右增加到250 MPa。结果表明,下填料的材料常数和微凸点的排列结构是影响硅芯片局部变形和应力的主要因素。
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