A Low-Jitter Injection-Locked Clock Multiplier Using 97-μW Transformer-Based VCO with 18-kHz Flicker Noise Corner

Abstract

SUMMARY This paper presents a high jitter performance injection- locked clock multiplier (ILCM) using an ultra-low power (ULP) voltage-controlled oscillator (VCO) for IoT application in 65-nm CMOS. The proposed transformer-based VCO achieves low flicker noise corner and sub-100 (cid:181) W power consumption. Double cross-coupled NMOS transistors sharing the same current provide high transconductance. The network using high-Q factor transformer (TF) provides a large tank impedance to min- imize the current requirement. Thanks to the low current bias with a small conduction angle in the ULP VCO design, the proposed TF-based VCO’s flicker noise can be suppressed, and a good PN can be achieved in flicker region (1 / f 3 ) with sub-100 (cid:181) W power consumption. Thus, a high figure-of- merit (FoM) can be obtained at both 100kHz and 1MHz without additional inductor. The proposed VCO achieves phase noise of -94.5 / -115.3dBc / Hz at 100kHz / 1MHz frequency o ff set with a 97 (cid:181) W power consumption, which corresponds to a -193 / -194dBc / Hz VCO FoM at 2.62GHz oscil- lation frequency. The measurement results show that the 1 / f 3 corner is below 60kHz over the tuning range from 2.57GHz to 3.40GHz. Thanks to the proposed low power VCO, the total ILCM achieves 78fs RMS jitter while using a high reference clock. A 960fs RMS jitter can be achieved with a 40MHz common reference and 107 (cid:181) W corresponding power.