{"title":"Fault Analysis and Clearance in FL-APC DC–AC Converter","authors":"K. Suresh;E. Parimalasundar","doi":"10.1109/ICJECE.2022.3220090","DOIUrl":null,"url":null,"abstract":"The traditional active neutral-point-clamped (APC) dc–ac converter maintains great common-mode voltage with high-frequency (CMV-HF) reduction capability, so it has limited voltage gain. This article presents a new five-level APC (FL-APC) dc–ac converter capable of voltage step-up in a single-stage inversion. In the suggested design, a common ground not only reduces the CMV-HF but also improves dc-link voltage usage. While comparing with traditional two-stage FL-APC dc–ac converter, the proposed design has lower voltage stresses and greater uniformity. While improving overall efficiency, the suggested clamped dc–ac converter saves three power switches and a capacitor. Modeling and actual tests have proven the suggested APC inverter’s overall operation, efficacy, and achievability. The proposed circuit is finally tested with fault clearance capability.","PeriodicalId":100619,"journal":{"name":"IEEE Canadian Journal of Electrical and Computer Engineering","volume":"46 1","pages":"1-6"},"PeriodicalIF":2.1000,"publicationDate":"2023-02-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Canadian Journal of Electrical and Computer Engineering","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10050346/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 8
Abstract
The traditional active neutral-point-clamped (APC) dc–ac converter maintains great common-mode voltage with high-frequency (CMV-HF) reduction capability, so it has limited voltage gain. This article presents a new five-level APC (FL-APC) dc–ac converter capable of voltage step-up in a single-stage inversion. In the suggested design, a common ground not only reduces the CMV-HF but also improves dc-link voltage usage. While comparing with traditional two-stage FL-APC dc–ac converter, the proposed design has lower voltage stresses and greater uniformity. While improving overall efficiency, the suggested clamped dc–ac converter saves three power switches and a capacitor. Modeling and actual tests have proven the suggested APC inverter’s overall operation, efficacy, and achievability. The proposed circuit is finally tested with fault clearance capability.