DFM: “Design for Manufacturing” or “Design Friendly Manufacturing”

Wenzhan Zhou, Hung-wen Chao, Yu Zhang, Chan-Yuan Hu, Wei Yuan, Yifei Lu, Hongmei Hu, Xiang Peng
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引用次数: 1

Abstract

: As the IC manufacturing enter sub 20nm tech nodes, DFM become more and more important to make sure more stable yield and lower cost. However, by introducing newly designed hardware (1980i etc.) process chemical (NTD) and Control Algorithm (Focus APC) into the mature tech nodes such as 14nm/12nm, more process window and less process variations are expected for latecomer wafer fabs (Tier-2/3 companies) who just started the competition with Tier-1 companies. With improved weapons, latecomer companies are able to review their DFM strategy one more time to see whether the benefit from hardware/process/control algorithm improvement can be shared with designers. In this paper, we use OPC simulation tools from different EDA suppliers to see the feasibility of transferring the benefits of hardware/process/control algorithm improvement to more relaxed design limitation through source mask optimization (SMO): 1) Better hardware: scanner (better focus/exposure variation), CMP (intrafield topo), Mask CD variation (relaxed MEEF spec), etc. 2) New process: from positive tone development to negative tone development. 3) Better control schemes: holistic focus feedback, feedback/forward overlay control, high order CD uniformity improvement. Simulations show all those gains in hardware and process can be transferred into more relaxed design such as sub design rule structure process window include forbidden pitches (1D) and smaller E2E gaps (2D weak points).
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DFM:“面向制造的设计”或“设计友好型制造”
随着集成电路制造进入20nm以下的技术节点,DFM对于确保更稳定的产量和更低的成本变得越来越重要。然而,通过将新设计的硬件(1980i等)工艺化学(NTD)和控制算法(Focus APC)引入14nm/12nm等成熟技术节点,对于刚刚开始与一级公司竞争的后发晶圆厂(2/3级公司)来说,预计会有更多的工艺窗口和更少的工艺变化。有了改进的武器,后发公司能够再次审查他们的DFM策略,看看是否可以与设计师分享硬件/过程/控制算法改进的好处。在本文中,我们使用来自不同EDA供应商的OPC仿真工具来查看通过源掩模优化(SMO)将硬件/过程/控制算法改进的好处转移到更宽松的设计限制的可行性:1)更好的硬件:扫描仪(更好的对焦/曝光变化),CMP(场内拓扑),掩模CD变化(宽松的MEEF规范)等2)新工艺:从正色调发展到负色调发展。3)更好的控制方案:整体焦点反馈、反馈/前向叠加控制、高阶CD均匀性改善。仿真表明,硬件和工艺上的所有增益都可以转移到更宽松的设计中,例如子设计规则结构,过程窗口包括禁止间距(1D)和较小的E2E间隙(2D弱点)。
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审稿时长
4 weeks
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