Single-pass redundancy addition and removal

Abstract

Redundancy-addition-and-removal is a rewiring technique which for a given target wire wt finds a redundant alternative wire wa. Addition of wa makes wt redundant and hence removable without changing the overall circuit functionality. Incremental logic restructuring based on this technique has been used in many applications. However, the search for valid alternative wires requires trial-and-error redundancy testing of a potentially large set of candidate wires. In this paper, we study the fundamental theory behind this technique and propose a new reasoning scheme which directly identifies alternative wires without performing trial-and-error tests. Experimental results show up to 15 times speedup in comparison to the best techniques in literature.