{"title":"SimplePipe: a simulation tool for task allocation and design of processor pipelines with application to network processors","authors":"M. Franklin, Vinayak Joshi","doi":"10.1109/MASCOT.2004.1348182","DOIUrl":null,"url":null,"abstract":"SimplePipe is a simulation framework/tool based on SimpleScalar (Austin, T. et al., IEEE Computer, 2002; http://www.simplescalar.com). SimplePipe analyzes the performance effects of alternative task allocations in systems of multiple pipelines where pipeline stages are either processors or dedicated hardware functions. Tasks are defined in terms of sequences of separate C program executions with each sequence representing the functional requirements of a flow. Performance effects associated with alternative assignment of shared memory modules to the pipeline stage can also be explored. SimplePipe was motivated by the performance requirements of network processors (NPs) that are configurable into multiple processor pipelines. The assignment of communication flow tasks to pipeline stages, selection of the number of stages, determination of processor cache sizes and the assignment of shared memory modules are important design decisions impacting performance. An assignment study illustrating SimplePipe capabilities is presented.","PeriodicalId":32394,"journal":{"name":"Performance","volume":"21 1","pages":"59-66"},"PeriodicalIF":0.0000,"publicationDate":"2004-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Performance","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MASCOT.2004.1348182","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
SimplePipe is a simulation framework/tool based on SimpleScalar (Austin, T. et al., IEEE Computer, 2002; http://www.simplescalar.com). SimplePipe analyzes the performance effects of alternative task allocations in systems of multiple pipelines where pipeline stages are either processors or dedicated hardware functions. Tasks are defined in terms of sequences of separate C program executions with each sequence representing the functional requirements of a flow. Performance effects associated with alternative assignment of shared memory modules to the pipeline stage can also be explored. SimplePipe was motivated by the performance requirements of network processors (NPs) that are configurable into multiple processor pipelines. The assignment of communication flow tasks to pipeline stages, selection of the number of stages, determination of processor cache sizes and the assignment of shared memory modules are important design decisions impacting performance. An assignment study illustrating SimplePipe capabilities is presented.
SimplePipe是一个基于SimpleScalar的仿真框架/工具(Austin, T. et al., IEEE Computer, 2002;http://www.simplescalar.com)。SimplePipe分析了多个管道系统中可选任务分配的性能影响,其中管道阶段要么是处理器,要么是专用硬件功能。任务是根据单独的C程序执行序列来定义的,每个序列代表一个流的功能需求。还可以探索与将共享内存模块分配到管道阶段相关的性能影响。SimplePipe是由可配置到多个处理器管道的网络处理器(NPs)的性能需求驱动的。通信流任务分配到流水线阶段、阶段数量的选择、处理器缓存大小的确定以及共享内存模块的分配是影响性能的重要设计决策。介绍了一个作业研究,说明了SimplePipe的功能。