T. Ouyang, Y. Hung, O. Lee, S. Y. Li, W. Chiu, T. Y. Hung, S. H. Wu, H. Chang
{"title":"Pre-fabricated High-density TSV Interposer for Programmable IC Applications","authors":"T. Ouyang, Y. Hung, O. Lee, S. Y. Li, W. Chiu, T. Y. Hung, S. H. Wu, H. Chang","doi":"10.1109/IMPACT56280.2022.9966630","DOIUrl":null,"url":null,"abstract":"The through-silicon-via interposer is recommended to enable 3D integrated circuit integration. However, the electrical design and manufacture of high-density TSVs is a challenge and has low fabrication capability. In this report, we have demonstrated a novel concept about a pre-fabricated high-density TSV interposer. A commonly reusable TSV design can eliminate the concern of the compatibility issue to interconnecting with the RDL trace. A 3% open ratio TSV with the diameter-to-depth aspect ratio 1:10 over 300 mm wafer is ultimately produced based on the modification of the dry Si etch parameters and subtle electroplating conditions to achieve a straight and void-free TSV. The pass-through current density on the TSV array can be effectively enhanced for a high I/O pin count application. The signal can reserve the integrity and possess an 8 Gbps transmission rate at 20 GHz high frequency. A pre-fabricated high-density TSV interposer can effectively reduce the production time and promote the throughput in 3D integrated circuit applications.","PeriodicalId":13517,"journal":{"name":"Impact","volume":"24 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Impact","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMPACT56280.2022.9966630","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The through-silicon-via interposer is recommended to enable 3D integrated circuit integration. However, the electrical design and manufacture of high-density TSVs is a challenge and has low fabrication capability. In this report, we have demonstrated a novel concept about a pre-fabricated high-density TSV interposer. A commonly reusable TSV design can eliminate the concern of the compatibility issue to interconnecting with the RDL trace. A 3% open ratio TSV with the diameter-to-depth aspect ratio 1:10 over 300 mm wafer is ultimately produced based on the modification of the dry Si etch parameters and subtle electroplating conditions to achieve a straight and void-free TSV. The pass-through current density on the TSV array can be effectively enhanced for a high I/O pin count application. The signal can reserve the integrity and possess an 8 Gbps transmission rate at 20 GHz high frequency. A pre-fabricated high-density TSV interposer can effectively reduce the production time and promote the throughput in 3D integrated circuit applications.