SigRace: signature-based data race detection

A. Muzahid, D. S. Gracia, Shanxiang Qi, J. Torrellas
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引用次数: 97

Abstract

Detecting data races in parallel programs is important for both software development and production-run diagnosis. Recently, there have been several proposals for hardware-assisted data race detection. Such proposals typically modify the L1 cache and cache coherence protocol messages, and largely lose their capability when lines get displaced or invalidated from the cache. To eliminate these shortcomings, this paper proposes a novel, different approach to hardware-assisted data race detection. The approach, called SigRace, relies on hardware address signatures. As a processor runs, the addresses of the data that it accesses are automatically encoded in signatures. At certain times, the signatures are automatically passed to a hardware module that intersects them with those of other processors. If the intersection is not null, a data race may have occurred. This paper presents the architecture of SigRace, an implementation, and its software interface. With SigRace, caches and coherence protocol messages are unmodified. Moreover, cache lines can be displaced and invalidated with no effect. Our experiments show that SigRace is significantly more effective than a state-of-the-art conventional hardware-assisted race detector. SigRace finds on average 29% more static races and 107% more dynamic races. Moreover, if we inject data races, SigRace finds 150% more static races than the conventional scheme.
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SigRace:基于签名的数据竞争检测
在并行程序中检测数据竞争对于软件开发和生产运行诊断都很重要。最近,有几个关于硬件辅助数据争用检测的建议。这样的建议通常修改L1缓存和缓存一致性协议消息,并且当线路从缓存中被替换或失效时,它们在很大程度上失去了功能。为了消除这些缺点,本文提出了一种新颖的、不同的硬件辅助数据争用检测方法。这种被称为SigRace的方法依赖于硬件地址签名。当处理器运行时,它所访问的数据的地址被自动编码到签名中。在某些时候,这些签名被自动传递到一个硬件模块,该模块将它们与其他处理器的签名相交。如果交集不为空,则可能发生了数据争用。本文介绍了SigRace的体系结构、实现及其软件接口。使用SigRace,缓存和一致性协议消息不会被修改。此外,缓存线可以被替换或无效,而不会产生任何影响。我们的实验表明,SigRace明显比最先进的传统硬件辅助种族检测器更有效。SigRace发现静态比赛平均增加29%,动态比赛平均增加107%。此外,如果我们注入数据竞争,SigRace发现的静态竞争比传统方案多150%。
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ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18 - 22, 2022 Special-purpose and future architectures Computer memory systems Basics of the central processing unit FRONT MATTER
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