Low-voltage low-power double bulk mixer for direct conversion receiver in 65nm CMOS

K. Schweiger, H. Uhrmann, H. Zimmermann
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引用次数: 1

Abstract

An innovative design with simulation results of a low-voltage bulk driven mixer for direct conversion receiver is presented. The circuit is designed in a 65nm digital CMOS process without analog extensions. It offers a conversion gain of 22dB at a clock frequency of 1.5GHz for GALILEO/GPS applications. The design is capable of operating at up to 7GHz with only 3dB gain decrease. The simulated noise figure is 27dB with a power consumption of 730µW. Simulations at a supply voltage of 0.9V instead of 1.2V show a gain decrease of only 3dB while the noise figure increases by 2dB.
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用于65nm CMOS直接转换接收器的低压低功耗双大块混频器
介绍了一种用于直接转换接收机的低压散装驱动混合器的创新设计,并给出了仿真结果。该电路采用无模拟扩展的65nm数字CMOS工艺设计。它在1.5GHz时钟频率下为GALILEO/GPS应用提供22dB的转换增益。该设计能够在高达7GHz的频率下工作,增益仅降低3dB。仿真噪声系数为27dB,功耗为730µW。在电源电压为0.9V而不是1.2V时的仿真显示,增益仅下降3dB,而噪声系数增加2dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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