A Dual Core Source/Drain GAA FinFET

Abstract

The emergence of fin-shaped field effect transistors (FinFETs) was governed by the requirement of the VLSI industry to include more functionalities per unit chip area. Enhanced gate control in a FinFET due to a surrounding gate architecture built on the fundamental geometry of a MOSFET made them highly compatible to the existing CMOS circuit applications. The announcement of a vertically stacked multiple FinFET structure named as Ribbon-FET by Intel Corporation in 2021 motivates the work presented in this article. This article proposes a dual core sourcedrain gate-all-around FinFET, and evaluates its performance in terms of variation in core doping concentrations through technology computer aided design (TCAD) simulations. The advantage of having a dual core in source and drain regions is the opportunity to tune the performance metrics of the device by altering the doping concentration in the outer, and inner cores. The response of the optimized architecture to presence of acceptor-like, and donor-like traps in oxide/ channel interface is presented. The acceptor-like traps affect the characteristics in its on-state, whereas the donor-like traps influence the off-state of the device. DIBL reduces with the introduction of interface traps.