Bias stress induced threshold voltage shift in buckled thin film transistors

Abstract

Threshold voltage shift under bias stress is a significant instability mechanism in TFT based analog circuits. Here we study the impact of substrate curvature, due to buckling, on the threshold voltage shift in TFTs. The buckled structure is realized by texturing the gate metal layer in the form of periodic striations oriented along different directions. Preliminary studies under constant gate and drain bias indicate that the buckled TFTs suffer from a higher shift compared to planar devices. It is also observed that the angle of orientation of buckling influences the threshold voltage shift. It has been proposed that the observed trends in the experimental data are due to the vital role played by the contact resistance in buckled devices.