{"title":"Live in-service modification of optical network elements implemented with Xilinx FPGAs","authors":"G. Brebner","doi":"10.1364/NFOEC.2011.NWC3","DOIUrl":null,"url":null,"abstract":"This paper demonstrates that Xilinx FPGA partial reconfiguration technology can yield resource and power savings in optical network elements through selective hardware modification during live operation, illustrated by two examples: data framing and EFEC calculation.","PeriodicalId":6373,"journal":{"name":"2011 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1364/NFOEC.2011.NWC3","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper demonstrates that Xilinx FPGA partial reconfiguration technology can yield resource and power savings in optical network elements through selective hardware modification during live operation, illustrated by two examples: data framing and EFEC calculation.
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