{"title":"VHSIC phase 2 technology and the EHF modem/controller","authors":"D. Matsunaga","doi":"10.1109/MILCOM.1988.13475","DOIUrl":null,"url":null,"abstract":"The author conducts a brief survey of TRW very-high-speed integrated circuits (VHSIC) Phase 2 technology and then explores its potential benefits along with its limitations to an EHF modem/controller. The impact of TRW VHSIC Phase 2 SuperChips is analyzed for the overall command-post and manpack modem/controller requirements, hardware architecture, data/control flow and mechanical design. It is found that the use of TRW VHSIC Phase 2 chips results in an order-of-magnitude improvement of size, weight, power, and reliability over conventional technology. Design areas which potentially limit the impact of high levels of integration are also discussed, along with their solutions.<<ETX>>","PeriodicalId":66166,"journal":{"name":"军事通信技术","volume":"2 1","pages":"749-753 vol.3"},"PeriodicalIF":0.0000,"publicationDate":"1988-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"军事通信技术","FirstCategoryId":"1093","ListUrlMain":"https://doi.org/10.1109/MILCOM.1988.13475","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The author conducts a brief survey of TRW very-high-speed integrated circuits (VHSIC) Phase 2 technology and then explores its potential benefits along with its limitations to an EHF modem/controller. The impact of TRW VHSIC Phase 2 SuperChips is analyzed for the overall command-post and manpack modem/controller requirements, hardware architecture, data/control flow and mechanical design. It is found that the use of TRW VHSIC Phase 2 chips results in an order-of-magnitude improvement of size, weight, power, and reliability over conventional technology. Design areas which potentially limit the impact of high levels of integration are also discussed, along with their solutions.<>
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