Interleaving Boost Extender Topology

IF 1 4区 工程技术 Q4 COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI:10.1109/COMPEL52896.2023.10221007
Vikas Kumar Rathore, M. Evzelman, M. Peretz
{"title":"Interleaving Boost Extender Topology","authors":"Vikas Kumar Rathore, M. Evzelman, M. Peretz","doi":"10.1109/COMPEL52896.2023.10221007","DOIUrl":null,"url":null,"abstract":"An efficient first stage interleaving technique for Boost Extender topology is presented. A unique single conversion operation of the boost extender topology, and current stress distribution between the modules pose a challenge on creating a successful and efficient interleaving scheme with this converter. A mechanism is developed, where a supporting first stage in a multilevel high voltage gain structure is added. The supporting stage shares the high current stress of the first boosting stage, compatible with interleaving technique, which reduces the ripples of each inductor along with the input and first stage output capacitor ripples. In addition, the voltage multiplication modules are shared between the interleaved stages providing significant component reduction comparing to traditional interleaving schemes. The concept was validated on a 260W experimental laboratory prototype. Theoretical predictions well agree with simulation and experimental results.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"26 1","pages":"1-6"},"PeriodicalIF":1.0000,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1109/COMPEL52896.2023.10221007","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS","Score":null,"Total":0}
引用次数: 0

Abstract

An efficient first stage interleaving technique for Boost Extender topology is presented. A unique single conversion operation of the boost extender topology, and current stress distribution between the modules pose a challenge on creating a successful and efficient interleaving scheme with this converter. A mechanism is developed, where a supporting first stage in a multilevel high voltage gain structure is added. The supporting stage shares the high current stress of the first boosting stage, compatible with interleaving technique, which reduces the ripples of each inductor along with the input and first stage output capacitor ripples. In addition, the voltage multiplication modules are shared between the interleaved stages providing significant component reduction comparing to traditional interleaving schemes. The concept was validated on a 260W experimental laboratory prototype. Theoretical predictions well agree with simulation and experimental results.
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交错升压扩展器拓扑
提出了一种高效的升压扩展器拓扑一级交错技术。升压扩展器拓扑的独特单一转换操作以及模块之间的电流应力分布对使用该转换器创建成功且高效的交错方案提出了挑战。开发了一种机制,其中在多电平高电压增益结构中添加了支持的第一级。支撑级分担第一级升压级的高电流应力,兼容交错技术,减少每个电感的纹波以及输入和第一级输出电容的纹波。此外,电压倍增模块在交错级之间共享,与传统的交错方案相比,提供了显著的组件减少。概念在260W实验实验室原型上得到验证。理论预测与模拟和实验结果吻合较好。
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来源期刊
CiteScore
1.60
自引率
0.00%
发文量
124
审稿时长
4.2 months
期刊介绍: COMPEL exists for the discussion and dissemination of computational and analytical methods in electrical and electronic engineering. The main emphasis of papers should be on methods and new techniques, or the application of existing techniques in a novel way. Whilst papers with immediate application to particular engineering problems are welcome, so too are papers that form a basis for further development in the area of study. A double-blind review process ensures the content''s validity and relevance.
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