Evaluation of Intel Xeon E5-2600v2 based cluster for technical computing workloads

P. Gepner, V. Gamayunov, Wieslawa Litke, L. Sauge, C. Mazauric
{"title":"Evaluation of Intel Xeon E5-2600v2 based cluster for technical computing workloads","authors":"P. Gepner, V. Gamayunov, Wieslawa Litke, L. Sauge, C. Mazauric","doi":"10.1109/HPCSim.2014.6903787","DOIUrl":null,"url":null,"abstract":"In Intel's CPU releasing model, the new Ivy Bridge is a “TICK” that follows Sandy Bridge's (“TOCK”) microarchitecture principles, however, after undergoing a die shrink it is manufactured at 22nm. It also incorporates new micro-architectural upgrades. In this paper we shall evaluate the performance of a 16 bi-socket node cluster based on this 3rd generation Intel Xeon Processor E5-2697v2 meant for server and workstation market. The new architectural improvements are assessed via High Performance Computing Challenge (HPCC) benchmarks and NAS Parallel Benchmarks (NPB) where the interconnect technology is challenged by the standard Intel® MPI Benchmark suite performance evaluator. Finally we tested performance of the new system using the subset of the benchmark from PRACE consortium. We compare achieved results against the outcomes of the tests performed on clusters based on previous generations of Intel Xeon processors: Intel Xeon E5-2680 (“Sandy Bridge-EP”), Intel Xeon 5680 (“Westmere-EP”) and Intel Xeon 5570 (“Nehalem-EP”) respectively.","PeriodicalId":6469,"journal":{"name":"2014 International Conference on High Performance Computing & Simulation (HPCS)","volume":"5 1","pages":"919-926"},"PeriodicalIF":0.0000,"publicationDate":"2014-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on High Performance Computing & Simulation (HPCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPCSim.2014.6903787","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

In Intel's CPU releasing model, the new Ivy Bridge is a “TICK” that follows Sandy Bridge's (“TOCK”) microarchitecture principles, however, after undergoing a die shrink it is manufactured at 22nm. It also incorporates new micro-architectural upgrades. In this paper we shall evaluate the performance of a 16 bi-socket node cluster based on this 3rd generation Intel Xeon Processor E5-2697v2 meant for server and workstation market. The new architectural improvements are assessed via High Performance Computing Challenge (HPCC) benchmarks and NAS Parallel Benchmarks (NPB) where the interconnect technology is challenged by the standard Intel® MPI Benchmark suite performance evaluator. Finally we tested performance of the new system using the subset of the benchmark from PRACE consortium. We compare achieved results against the outcomes of the tests performed on clusters based on previous generations of Intel Xeon processors: Intel Xeon E5-2680 (“Sandy Bridge-EP”), Intel Xeon 5680 (“Westmere-EP”) and Intel Xeon 5570 (“Nehalem-EP”) respectively.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
基于Intel至强E5-2600v2的集群技术计算工作负载评估
在英特尔发布的CPU模型中,新的Ivy Bridge是一个“TICK”,遵循Sandy Bridge(“TOCK”)的微架构原则,然而,在经历了芯片缩小之后,它是在22nm制造的。它还包含了新的微架构升级。在本文中,我们将评估基于第三代英特尔至强处理器E5-2697v2的16双插座节点集群的性能,该处理器适用于服务器和工作站市场。新的架构改进通过高性能计算挑战(HPCC)基准测试和NAS并行基准测试(NPB)进行评估,其中互连技术受到标准英特尔®MPI基准套件性能评估器的挑战。最后,我们使用来自PRACE联盟的基准子集测试了新系统的性能。我们将取得的结果与基于前几代英特尔至强处理器的集群上执行的测试结果进行了比较:分别是英特尔至强E5-2680(“Sandy Bridge-EP”)、英特尔至强5680(“Westmere-EP”)和英特尔至强5570(“Nehalem-EP”)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
AI4IO: A Suite of Ai-Based Tools for IO-Aware HPC Resource Management Improving Efficiency and Performance Through Faster Scheduling Mechanisms Towards an Integral System for Processing Big Graphs at Scale Advances in High Performance Computing - Results of the International Conference on "High Performance Computing", HPC 2019, Borovets, Bulgaria, September 2-6, 2019 Role of HPC in next-generation AI
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1