{"title":"VHDL implementation of IEEE 754 floating point unit","authors":"Anjana Sasidharan, P. Nagarajan","doi":"10.1109/ICICES.2014.7033999","DOIUrl":null,"url":null,"abstract":"IEEE-754 specifies interchange and arithmetic formats and methods for binary and decimal floating-point arithmetic in computer programming world. The implementation of a floating-point systemusing this standard can be done fully in software, or in hardware, or in any combination of software and hardware. This project propose VHDL implementation of IEEE-754 Floating point unit. In proposed work the pack, unpack and rounding mode was implemented using the VHDL language and simulation was verified.","PeriodicalId":13713,"journal":{"name":"International Conference on Information Communication and Embedded Systems (ICICES2014)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Information Communication and Embedded Systems (ICICES2014)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICES.2014.7033999","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
IEEE-754 specifies interchange and arithmetic formats and methods for binary and decimal floating-point arithmetic in computer programming world. The implementation of a floating-point systemusing this standard can be done fully in software, or in hardware, or in any combination of software and hardware. This project propose VHDL implementation of IEEE-754 Floating point unit. In proposed work the pack, unpack and rounding mode was implemented using the VHDL language and simulation was verified.
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