Stochastic Computing

J. Sartori, Rakesh Kumar
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引用次数: 7

Abstract

As device sizes shrink, manufacturing challenges at the device level are resulting in increased variability in physical circuit characteristics. Exponentially increasing circuit density has not only brought about concerns in the reliable manufacturing of circuits but also has exaggerated variations in dynamic circuit behavior. The resulting uncertainty in performance, power, and reliability imposed by compounding static and dynamic nondeterminism threatens the continuation of Moore's law, which has been arguably the primary driving force behind technology and innovation for decades. This situation is exacerbated by emerging computing applications, which exert considerable power and performance pressure on processors. Paradoxically, the problem is not nondeterminism, per se, but rather the approaches that designers have used to deal with it. The traditional response to variability has been to enforce determinism on an increasingly nondeterministic substrate through guardbands. As variability in circuit behavior increases, achieving deterministic behavior becomes increasingly expensive, as performance and energy penalties must be paid to ensure that all devices work correctly under all possible conditions. As such, the benefits of technology scaling are vanishing, due to the overheads of dealing with hardware variations through traditional means. Clearly, status quo cannot continue. Despite the above trends, the contract between hardware and software has, for the most part, remained unchanged. Software expects flawless results from hardware under all possible operating conditions. This rigid contract leaves potential performance gains and energy savings on the table, sacrificing efficiency in the common case in exchange for guaranteed correctness in all cases. However, as the marginal benefits of technology scaling continue to languish, a new vision for computing has begun to emerge. Rather than hiding variations under expensive guardbands, designers have begun to relax traditional correctness constraints and deliberately expose hardware variability to higher levels of the compute stack, thus tapping into potentially significant performance and energy benefits and also opening the potential for errors. Rather than paying the increasing price of hiding the true, stochastic nature of hardware, emerging stochastic computing techniques account for the inevitable variability and exploit it to increase efficiency. Stochastic computing techniques have been proposed at nearly all levels of the computing stack, including stochastic design optimizations, architecture frameworks, compiler optimizations, application transformations, programming language support, and testing techniques. In this monograph, we review work in the area of stochastic computing and discuss the promise and challenges of the field.
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随机计算
随着器件尺寸的缩小,器件级的制造挑战导致物理电路特性的可变性增加。电路密度的指数级增长不仅给电路的可靠性制造带来了问题,而且会使电路的动态行为变化过大。静态和动态的不确定性所带来的性能、功率和可靠性的不确定性威胁到摩尔定律的延续,而摩尔定律几十年来一直被认为是技术和创新背后的主要驱动力。新兴的计算应用程序加剧了这种情况,这些应用程序对处理器施加了相当大的功率和性能压力。矛盾的是,问题本身不是不确定性,而是设计师用来处理它的方法。对可变性的传统反应是通过保护带在日益不确定的基质上强制执行决定论。随着电路行为的可变性增加,实现确定性行为变得越来越昂贵,因为必须付出性能和能量损失来确保所有设备在所有可能的条件下都能正常工作。因此,由于通过传统方法处理硬件变化的开销,技术扩展的好处正在消失。显然,现状不能继续下去。尽管有上述趋势,硬件和软件之间的契约在很大程度上没有改变。软件期望硬件在所有可能的操作条件下产生完美的结果。这种严格的契约放弃了潜在的性能提升和能源节约,牺牲了普通情况下的效率,以换取在所有情况下保证的正确性。然而,随着技术扩展的边际效益持续减弱,计算的新愿景已经开始出现。设计人员不再将变化隐藏在昂贵的保护之下,而是开始放松传统的正确性约束,并故意将硬件可变性暴露给更高级别的计算堆栈,从而利用潜在的显著性能和能源优势,同时也打开了错误的可能性。新兴的随机计算技术没有为隐藏硬件的真实、随机特性而付出越来越大的代价,而是解释了不可避免的可变性,并利用它来提高效率。随机计算技术已经在几乎所有级别的计算堆栈中被提出,包括随机设计优化、架构框架、编译器优化、应用程序转换、编程语言支持和测试技术。在这本专著中,我们回顾了随机计算领域的工作,并讨论了该领域的前景和挑战。
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Foundations and Trends in Electronic Design Automation
Foundations and Trends in Electronic Design Automation ENGINEERING, ELECTRICAL & ELECTRONIC-
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期刊介绍: Foundations and Trends® in Electronic Design Automation publishes survey and tutorial articles in the following topics: - System Level Design - Behavioral Synthesis - Logic Design - Verification - Test - Physical Design - Circuit Level Design - Reconfigurable Systems - Analog Design Each issue of Foundations and Trends® in Electronic Design Automation comprises a 50-100 page monograph written by research leaders in the field.
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