{"title":"Attack resistant sense amplifier based PUFs (SA-PUF) with deterministic and controllable reliability of PUF responses","authors":"M. Bhargava, Cagla Cakir, K. Mai","doi":"10.1109/HST.2010.5513106","DOIUrl":null,"url":null,"abstract":"Physically Unclonable Functions (PUFs) implement die specific random functions that offer a promising mechanism in various security applications. Stability or reliability of a PUF response is a key concern, especially when the IC containing the PUF is subjected to severe environmental variations. In cryptographic applications, errors in response bits need to be completely corrected and this is often done using costly error correction codes (ECC). In identification and authentication applications however, a complete correction of response bits is not necessary and hence costly ECC schemes can be avoided. On the flip side, a response with faulty bits cannot be post-conditioned by one-way functions, resulting in an increased vulnerability to modeling attacks. We propose a sense amplifier based PUF (SA-PUF) structure that generates random bits with increased reliability, resulting in significantly fewer errors in response bits. This eliminates the need of complex and costly ECC circuitry in cryptographic applications. Further, with the reduced cost of ECC implementation, the use of one-way functions to post-condition the outputs becomes more viable even in identification and authentication applications, thereby increasing their resilience to modeling based attacks. Finally, SA-PUF elements are inherently more resilient to environmental changes as compared to most of the earlier proposed silicon based PUF structures. Simulation data in 65nm bulk CMOS industrial process show that SA-based PUFs have 2.5x-3.5x lower errors compared to other PUF implementations when subjected to similar environmental variations.","PeriodicalId":6367,"journal":{"name":"2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)","volume":"32 1","pages":"106-111"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"52","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HST.2010.5513106","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 52
Abstract
Physically Unclonable Functions (PUFs) implement die specific random functions that offer a promising mechanism in various security applications. Stability or reliability of a PUF response is a key concern, especially when the IC containing the PUF is subjected to severe environmental variations. In cryptographic applications, errors in response bits need to be completely corrected and this is often done using costly error correction codes (ECC). In identification and authentication applications however, a complete correction of response bits is not necessary and hence costly ECC schemes can be avoided. On the flip side, a response with faulty bits cannot be post-conditioned by one-way functions, resulting in an increased vulnerability to modeling attacks. We propose a sense amplifier based PUF (SA-PUF) structure that generates random bits with increased reliability, resulting in significantly fewer errors in response bits. This eliminates the need of complex and costly ECC circuitry in cryptographic applications. Further, with the reduced cost of ECC implementation, the use of one-way functions to post-condition the outputs becomes more viable even in identification and authentication applications, thereby increasing their resilience to modeling based attacks. Finally, SA-PUF elements are inherently more resilient to environmental changes as compared to most of the earlier proposed silicon based PUF structures. Simulation data in 65nm bulk CMOS industrial process show that SA-based PUFs have 2.5x-3.5x lower errors compared to other PUF implementations when subjected to similar environmental variations.