Demo: SLP-aware word length optimization

Abstract

Many embedded processors do not support floating-point arithmetic. But they generally provide support for SIMD as a mean to improve performance for near-zero cost overhead. Achieving good performance when targeting such processors requires the use of fixed-point arithmetic and efficient SIMDization. To reduce applications time-to-market, automatic SIMDization and floating-point conversion methodologies have been proposed. In this paper we show that these two problems are strongly related and should be considered jointly. We briefly present a new SLP-aware floating-point conversion flow.