{"title":"FPGA Implementation of Space-Based AIS","authors":"M. Adarsh, K. Adithya, Akshay Nimbal","doi":"10.1109/WISPNET.2018.8538703","DOIUrl":null,"url":null,"abstract":"The Automatic Identification System (AIS) is an automated tracking system used for exchanging static and dynamic vessel information between the AIS terminals. Data transmitted by the AIS station is received by other vessel or base station. But due to the range limitations in the ground-based network, we go for Space-based Universal ship-borne Automatic Identification System (S-AIS) wherein the AIS-Data is received by satellite for the global coverage. In this paper, we present the performance analysis of the space-based AIS system considering the Field of View (FoV) of the satellite spanning a large number of Self-Organizing Time Division Multiple Access (SOTDMA) clusters and implementation of AIS Modem using SOTDMA scheme with Gaussian Minimum Shift Keying (GMSK) modulation. The introduction of reconfigurable devices and high level hardware description languages have made the design of AIS modem to be implemented efficiently on Virtex5-xc5vlx110t FPGA. The system is optimized in terms of hardware utilization. The SOTDMA architecture is designed at the Behavioral level of abstraction with constraints as defined by International Telecommunication Union (ITU) and is implemented using Verilog Hardware Description Language (HDL) on the FPGA, GMSK modulator and demodulator is designed in Xilinx System Generator. The SOTDMA architecture implemented is tested by considering multiple users to verify the unique slot allocation within a SOTDMA cluster. The FPGA implementation results are presented.","PeriodicalId":6858,"journal":{"name":"2018 International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET)","volume":"15 1","pages":"1-5"},"PeriodicalIF":0.0000,"publicationDate":"2018-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WISPNET.2018.8538703","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The Automatic Identification System (AIS) is an automated tracking system used for exchanging static and dynamic vessel information between the AIS terminals. Data transmitted by the AIS station is received by other vessel or base station. But due to the range limitations in the ground-based network, we go for Space-based Universal ship-borne Automatic Identification System (S-AIS) wherein the AIS-Data is received by satellite for the global coverage. In this paper, we present the performance analysis of the space-based AIS system considering the Field of View (FoV) of the satellite spanning a large number of Self-Organizing Time Division Multiple Access (SOTDMA) clusters and implementation of AIS Modem using SOTDMA scheme with Gaussian Minimum Shift Keying (GMSK) modulation. The introduction of reconfigurable devices and high level hardware description languages have made the design of AIS modem to be implemented efficiently on Virtex5-xc5vlx110t FPGA. The system is optimized in terms of hardware utilization. The SOTDMA architecture is designed at the Behavioral level of abstraction with constraints as defined by International Telecommunication Union (ITU) and is implemented using Verilog Hardware Description Language (HDL) on the FPGA, GMSK modulator and demodulator is designed in Xilinx System Generator. The SOTDMA architecture implemented is tested by considering multiple users to verify the unique slot allocation within a SOTDMA cluster. The FPGA implementation results are presented.
自动识别系统(AIS)是一种自动跟踪系统,用于在AIS终端之间交换静态和动态船舶信息。AIS站发送的数据被其他船只或基站接收。但由于地面网络的范围限制,我们选择了天基通用舰载自动识别系统(S-AIS),其中ais数据由卫星接收,覆盖全球。本文在考虑卫星视场(FoV)跨越大量自组织时分多址(SOTDMA)集群的情况下,对天基AIS系统进行了性能分析,并采用高斯最小移位键控(GMSK)调制的SOTDMA方案实现了AIS调制解调器。引入可重构器件和高级硬件描述语言,使得AIS调制解调器的设计能够在Virtex5-xc5vlx110t FPGA上高效实现。系统在硬件利用率方面进行了优化。SOTDMA架构采用国际电信联盟(ITU)定义的约束在行为抽象层进行设计,在FPGA上使用Verilog硬件描述语言(HDL)实现,GMSK调制器和解调器在Xilinx System Generator中设计。通过考虑多个用户来验证SOTDMA集群内的唯一插槽分配,对实现的SOTDMA体系结构进行了测试。给出了FPGA实现结果。