{"title":"Construction Technique and Evaluation of High Performance t-bit Burst Error Correcting Codes for Protecting MCUs","authors":"R. Maity, J. Samanta, J. Bhaumik","doi":"10.1142/s0218126623501426","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":14696,"journal":{"name":"J. Circuits Syst. Comput.","volume":"18 1","pages":"2350142:1-2350142:21"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"J. Circuits Syst. Comput.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1142/s0218126623501426","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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