Interconnecting computers with the high speed parallel interface

Abstract

A variety of local computer network architectures have been evaluated for use in the Los Alamos National Laboratory Central Computing Facility in support of scientific research at this laboratory. A store-and-forward switched message system built around hardware products known as high speed parallel interfaces (HSPIs) was determined to be superior in this application to the more conventional contention bus systems. The HSPIs, together with some dedicated computers used as intermediate switching nodes, implement this store-and-forward architecture and form the backbone of the integrated computer network.

The HSPI channel standard was developed at Los Alamos for the interconnection of computers of different manufacture. This standard intercomputer interface is used for passing data and messages via the input-output channels of the different computers. Reliable full-duplex point-to-point data transfers at speeds of up to 50 Mbits s⁻¹ are accommodated. Extensive error detection and error correction capabilities are included in the HSPI hardware. HSPIs are currently in around-the-clock use at Los Alamos, interconnecting the computers of one of the world's most powerful computer networks.

In this paper the HSPI specifications and use of the HSPIs in the network are discussed. The Los Alamos network architecture and comparisons to a contention bus architecture are also discussed.