Demo: Ker-ONE: Embedded virtualization approach with dynamic reconfigurable accelerators management

Tian Xia, Mohamad-Al-Fadl Rihani, Jean-Christophe Prévotet, F. Nouvel
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引用次数: 3

Abstract

Today, the CPU-FPGA hybrid architecture has become more and more popular in embedded systems. In this approach CPU and FPGA domains are tightly connected by dedicated interconnections, which makes it possible to enhance the traditional CPU virtualization with the dynamic partial reconfiguration (DPR) technology on FPGA. Our research is intended to propose an innovative approach Ker-ONE, which provides a lightweight micro-kernel to support real-time virtualization. Plus, it provide an abstract and transparent layer for virtual machines (VM) to access reconfigurable accelerators. In this demo, the proposed framework is implemented on ARM-FPGA platform, and the mechanism of real-time scheduling/allocation is presented in details via GUI demonstration. We have shown that our approach manages to achieve the a high level of performance with low overheads.
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演示:Ker-ONE:具有动态可重构加速器管理的嵌入式虚拟化方法
目前,CPU-FPGA混合架构在嵌入式系统中越来越受欢迎。该方法通过专用互连将CPU和FPGA域紧密连接起来,从而可以利用FPGA上的动态部分重构(DPR)技术来增强传统的CPU虚拟化。我们的研究旨在提出一种创新的方法Ker-ONE,它提供了一个轻量级的微内核来支持实时虚拟化。此外,它为虚拟机(VM)提供了一个抽象和透明的层来访问可重构加速器。在此演示中,提出的框架在ARM-FPGA平台上实现,并通过GUI演示详细介绍了实时调度/分配机制。我们已经证明,我们的方法能够以较低的开销实现高水平的性能。
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