A high-gain Source degenerative Cascode LNA for Wi-MAX and W-CDMA applications at 3.5GHz

Naveen Motamarri, Munshi Nurul Islam, P. Apurbaranjan, S. Deepu, S. Prasantakumar
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引用次数: 2

Abstract

This paper presents the design and simulation of High gain Source degenerated Cascode LNA for Wi-max and W-CDMA applications at 3.5GHz. The design uses an enhanced cascade topology to attain improved forward gain and noise figure. Th is design includes lumped elements like inductor, capacitor and resistors to design input and output matching networks. The targeted narrow-band gain, impedance matching and noise figure are achieved at the 3.5GHz. Circuit has been designed Using standard UMC 0.18μm CMOS technology and simulated in the Cadence Spectre RF tool. Targeted narrowband gain, noise figure, are 25dB and 2dB respectively. The designed circuit exhibits narrow-band gain of 27.18 dB and noise figure of 1.7 dB with Input and output return loss of -17.57 dB and -29.21 dB respectively. Circuit operates from the supply voltage of 1.8V and draws a current of 6.39mA.
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一种用于3.5GHz Wi-MAX和W-CDMA应用的高增益源退化级联码LNA
本文介绍了一种适用于3.5GHz Wi-max和W-CDMA应用的高增益源退化级联码LNA的设计与仿真。该设计采用增强级联拓扑,以获得改进的正向增益和噪声系数。该设计包括电感、电容和电阻等集总元件,以设计输入和输出匹配网络。在3.5GHz下实现了目标窄带增益、阻抗匹配和噪声系数。电路采用标准的UMC 0.18μm CMOS技术设计,并在Cadence Spectre射频工具中进行了仿真。目标窄带增益和噪声系数分别为25dB和2dB。设计的电路窄带增益为27.18 dB,噪声系数为1.7 dB,输入和输出回波损耗分别为-17.57 dB和-29.21 dB。电路工作在1.8V的电源电压和6.39mA的电流。
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