A low phase noise CMOS voltage-controlled differential ring oscillator

Abstract

The paper presents a novel low phase noise voltage-controlled ring oscillator designed in UMC 0.18μm technology. The proposed design contains nine stages of differential delay cells with multiple-pass loop architecture. Linear frequency - voltage characteristics are exhibited over a wide tuning range. The tuning range of nine-stage ring oscillator is 1.1-2.3 GHz. A phase noise of -108.13dBc/Hz was estimated at an offset of 1MHz from a center frequency of 1.8 GHz. The design uses a 1.8V supply and consumes a maximum power of 65mW while operating at 1.8GHz.