{"title":"Reduced Low-Voltage Electromyographic Signal Acquisition System Using Subthreshold Technique","authors":"J. R. Sánchez, A. Vazquez, I. Padilla-Cantoya","doi":"10.1109/CCE50788.2020.9299183","DOIUrl":null,"url":null,"abstract":"This document presents a low-voltage CMOS electronic system for electromyographic (EMG) signals acquisition. For its development, the system requirements and characteristics were established and simulations were made using Virtuoso Cadence software for 180 nm TSMC technology. The circuits used were implemented in the subthreshold regime for low potential consumption. As result, a two-stage system was obtained, the first stage is an instrumentation amplifier based on a current conveyor, supplied with 0.7V, consuming 55μW and a commonmode rejection ratio (CMRR) of 190dB. Besides, the second stage involves proven Sallen Key filters that were implemented using different design parameters, both high and low pass with a cutoff frequency of 20Hz and 1.3KHz, respectively, with 8dB gain, supplied with ±0.35V and power dissipation of 2.99μW, for each filter.","PeriodicalId":6661,"journal":{"name":"2014 11th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)","volume":"84 1","pages":"1-5"},"PeriodicalIF":0.0000,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 11th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCE50788.2020.9299183","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This document presents a low-voltage CMOS electronic system for electromyographic (EMG) signals acquisition. For its development, the system requirements and characteristics were established and simulations were made using Virtuoso Cadence software for 180 nm TSMC technology. The circuits used were implemented in the subthreshold regime for low potential consumption. As result, a two-stage system was obtained, the first stage is an instrumentation amplifier based on a current conveyor, supplied with 0.7V, consuming 55μW and a commonmode rejection ratio (CMRR) of 190dB. Besides, the second stage involves proven Sallen Key filters that were implemented using different design parameters, both high and low pass with a cutoff frequency of 20Hz and 1.3KHz, respectively, with 8dB gain, supplied with ±0.35V and power dissipation of 2.99μW, for each filter.