VLS-grown silicon nanowires — Dopant deactivation and tunnel FETs

M. Bjork, K. Moselund, H. Schmid, H. Ghoneim, S. Karg, E. Lortscher, J. Knoch, W. Riess, H. Riel
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引用次数: 2

Abstract

Today, the continued miniaturization of field effect transistors (FETs) results in major scaling issues that curtail further voltage reduction. The resultant increase in power consumption density limits the overall performance. Therefore, alternative materials and devices are required that support steep sub-threshold slopes and low-voltage operation. The tunnel FET (TFET) is regarded as the most promising candidate because it is based on gate-controlled band-to-band tunneling in a p-i-n+ structure and thus can break the 60 mV/dec limit of conventional FETs [1]. Implementing the TFET principle in the nanowire (NW) geometry provides optimum electrostatic control. Here we demonstrate controlled in-situ doping of silicon (Si) NWs, the effect of scaling on the active number of doping atoms in the NW and the implementation of a Si NW TFET.
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vls生长的硅纳米线-掺杂失活和隧道场效应管
今天,场效应晶体管(fet)的持续小型化导致了主要的缩放问题,限制了进一步的电压降低。由此导致的功率消耗密度的增加限制了整体性能。因此,需要替代材料和设备来支持陡峭的亚阈值斜坡和低压运行。隧道场效应管(TFET)被认为是最有希望的候选者,因为它基于p-i-n+结构的栅极控制带对带隧道,因此可以突破传统场效应管的60 mV/dec限制[1]。在纳米线(NW)几何结构中实现TFET原理提供了最佳的静电控制。在这里,我们展示了可控的原位掺杂硅(Si) NWs,缩放对NW中掺杂原子活性数的影响以及Si NW TFET的实现。
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9 Steep Slope Transistors Frontmatter 5 Metal–Oxide–Semiconductor Field-Effect Transistors A Color Map for 2D Materials 6 Device Simulation
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