{"title":"A Novel Clock-Fault Detection and Self-Recovery Circuit for Reliable Nanoelectronics System","authors":"Changhong Yu","doi":"10.1109/IWISA.2009.5072657","DOIUrl":null,"url":null,"abstract":"Due to discrepancies in manufacturing process and the probabilistic nature of quantum mechanical phenomenon, faulttolerant architectures are a prerequisite to build reliable nanoelectronic systems from unreliable nanoelectronic devices. Various defects and interference such as doping discrepancies, supply noise and cross-talks could lead to clock irregularity and malformed clock signals in nanoelectronic systems, thus resulting in faulty operations of sequential circuits. As a result, fault tolerance clock distribution is more and more important in nanoelectronic systems. In this paper, a novel architecture for clock recovery is delivered. Very simple circuit is designed for time-to-voltage converter with transforming the error of time to the error of voltage. In order to illustrate the fault-tolerance capability by the detection and recovery circuitry, a prototype CMOS design of this proposed circuit is presented. Simulation shows that the proposed architecture is very suite for integration to nanoelectronic circuit design to realize clock recovery. Keywordstime-to-voltage convertion; self-recovery; faulttolerance; clock","PeriodicalId":6327,"journal":{"name":"2009 International Workshop on Intelligent Systems and Applications","volume":"57 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Workshop on Intelligent Systems and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWISA.2009.5072657","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Due to discrepancies in manufacturing process and the probabilistic nature of quantum mechanical phenomenon, faulttolerant architectures are a prerequisite to build reliable nanoelectronic systems from unreliable nanoelectronic devices. Various defects and interference such as doping discrepancies, supply noise and cross-talks could lead to clock irregularity and malformed clock signals in nanoelectronic systems, thus resulting in faulty operations of sequential circuits. As a result, fault tolerance clock distribution is more and more important in nanoelectronic systems. In this paper, a novel architecture for clock recovery is delivered. Very simple circuit is designed for time-to-voltage converter with transforming the error of time to the error of voltage. In order to illustrate the fault-tolerance capability by the detection and recovery circuitry, a prototype CMOS design of this proposed circuit is presented. Simulation shows that the proposed architecture is very suite for integration to nanoelectronic circuit design to realize clock recovery. Keywordstime-to-voltage convertion; self-recovery; faulttolerance; clock