{"title":"Effect of oxide thickness on the low-frequency noise in MOSFET-based charge transfer devices","authors":"Vipul Singh, H. Inokawa, H. Satoh","doi":"10.1109/SNW.2010.5562539","DOIUrl":null,"url":null,"abstract":"Current noise in MOSFET-based charge transfer device consisting of different gate oxide thicknesses was evaluated. More than an order of magnitude higher noise levels were found to exist in 5nm thick gate oxide devices compared to 10 and 20 nm thick gate oxide devices as opposed to the theoretical expectation. The normalized noise powers under both CT and DC modes were formulated to be directly correlated to the power of interface charge fluctuation. As a result, normalized noise power was found to be in the order of the interface trap density in these devices, rationalizing the larger noise in the 5 nm gate oxide device.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"76 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Silicon Nanoelectronics Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SNW.2010.5562539","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Current noise in MOSFET-based charge transfer device consisting of different gate oxide thicknesses was evaluated. More than an order of magnitude higher noise levels were found to exist in 5nm thick gate oxide devices compared to 10 and 20 nm thick gate oxide devices as opposed to the theoretical expectation. The normalized noise powers under both CT and DC modes were formulated to be directly correlated to the power of interface charge fluctuation. As a result, normalized noise power was found to be in the order of the interface trap density in these devices, rationalizing the larger noise in the 5 nm gate oxide device.