Saddle add-on metallisation (SAM) for RF inductor implementation in standard IC interconnects

Abstract

A cost-effective add-on process module is proposed for reduction of ohmic losses of RF inductors and interconnects in RF/BiCMOS and RF/CMOS technologies built on logic CMOS processes. The module is based on the local thickening of the top metal layer of the thin CMOS interconnects by Cu plating. A record quality factor of 13 is achieved for a 10-nH inductor on a conventional 5-/spl Omega/-cm silicon substrate.