Diode based multi mode MTCMOS 8T adder for wake up noise minimization in 90nm CMOS technology

Abstract

Conventional MTCMOS technique is an efficient method for minimizing leakage current in sleep mode but it gives rise to a new problem i.e. wake up noise during active mode transition which gives the wrong output as well as reduces the lifetime of circuits. Wake up noise produce during OFF mode to ON mode transition which is an important challenge for MTCMOS circuits. Here a diode based multi mode 16 bit 8T full adder design is proposed for reducing this wake up noise and leakage current. In proposed technique we use a additional body biased based high Vth parallel pMOS for reduction of peak amplitude of wake up noise during active mode transition will also provide a way to control the leakage current in sleep mode due to stacking effect. The MTCMOS 16 bit 8T full adder design reduces the peak amplitude of wake up noise efficiently by 97.17% and reduce leakage current by 84.74% as compare to tri-mode MTCMOS technique and 16.81% reduced as compare to Dual switch MTCMOS technique To evaluate the significance of the proposed technique, the simulation has been performed for 16-bit 8T full adder circuit using tanner EDA with 90nm standard CMOS technology.