Comparative Analysis of Combined Finite State Machine Implementation on Chips of Different Manufacturers

Abstract

Certain ways of combined finite state mashine implementing on chips of different architectures and manufacturers are considered. Each discussed method allows achieving a certain reduction of hardware amount in the control device logic circuit. The aim of studies is to define the range of efficiency for each method correspondently to chips of the top manufactorers – Xilinx, Altera/Intel, Microsemi. The studies were conducted on chips of different series. Analysis of the experimental results is proposed and it may be used as a tip in practice of control unit design and optimization.