The impact of test on reliability, maintainability, and producibility

G. Nurie
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引用次数: 1

Abstract

High quality ASIC test programs ensure higher reliability and reduced cost of manufacturing and maintenance for the ASICs and for the systems in which they are used. In real world situations of less-than-perfect process yields, test programs with very high fault coverage are necessary for producing defect-free products. Manual test pattern generation is not practical and most conventional automatic test pattern generation cools do not handle sequential circuits. Thus, the designer is forced to adopt design-for-test (DFT) techniques that turn the sequential circuit into a combinational one. However, these DFT techniques cannot be used in leading edge applications where the circuit performance and the logic density cannot be sacrificed. Fortunately, a solution exists that takes advantage of the hierarchical design methodology commonly employed in the design of complex ASICs. This solution automatically produces test patterns for sequential circuits without requiring use of DFT techniques. The Test Design Expert (TDX) from ExperTest, uses an expert-systems approach by utilizing the behavior description of the ASIC to generate the test vectors for faults modeled at the gate level. TDX generates high quality test patterns for sequential circuits, including asynchronous ones, by understanding the function of the circuit from the behavior description written in VHDL. The advantage of this methodology is that the designer does not have to change the design methodology and is not restricted by the constraints of a specific DFT technique. Test development proceeds along with the logic design and no special requirements are imposed on the manufacturing process.<>
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测试对可靠性、可维护性和可生产性的影响
高质量的ASIC测试程序可确保更高的可靠性,并降低ASIC及其使用系统的制造和维护成本。在不太完美的过程产出的现实世界中,具有非常高故障覆盖率的测试程序对于生产无缺陷产品是必要的。手动测试模式生成是不实际的,大多数传统的自动测试模式生成冷却不处理顺序电路。因此,设计者被迫采用测试设计(DFT)技术,将顺序电路转换为组合电路。然而,这些DFT技术不能用于不能牺牲电路性能和逻辑密度的前沿应用。幸运的是,存在一种利用复杂asic设计中常用的分层设计方法的解决方案。该解决方案自动生成顺序电路的测试模式,而不需要使用DFT技术。来自ExperTest的测试设计专家(TDX)使用专家系统方法,利用ASIC的行为描述来生成在门级建模的故障的测试向量。TDX通过从用VHDL编写的行为描述中理解电路的功能,为顺序电路(包括异步电路)生成高质量的测试模式。这种方法的优点是,设计人员不必改变设计方法,也不受特定DFT技术的约束。测试开发与逻辑设计一起进行,并且没有对制造过程施加特殊要求。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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