Using 3-valued memory representation for state space reduction in embedded assembly code model checking

T. Reinbacher, M. Horauer, Bastian Schlich
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引用次数: 3

Abstract

Model checking of assembly code is a promising approach to satisfy the demand for verification in nowadays ultra-high reliable embedded systems software. Frequent interaction with its environment, e.g., by sending or reading data over the microcontrollers I/O lines, lies in the nature of embedded systems. Thus, making the long-standing problem of explicit-model checking even worse, namely the state-explosion problem. This paper presents a concept to tackle these difficulties by using a 3-valued logic in the state representation and showing its benefits in terms of state-space savings whenever logic operations are executed by the target microcontroller. To highlight the effectiveness of this approach, termed delayed nondeterminism with look ahead, an embedded program exemplifying typical microcontroller source code is analyzed and the resulting state space sizes are discussed. The introduced abstraction technique is implemented in the MCS-51 simulator component for the [mc]square model checker which is developed by the RWTH Aachen University.
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在嵌入式汇编代码模型检查中使用3值内存表示进行状态空间缩减
汇编代码的模型检验是满足当今超高可靠性嵌入式系统软件验证需求的一种很有前途的方法。与环境的频繁交互,例如,通过微控制器的I/O线发送或读取数据,是嵌入式系统的本质。从而使长期存在的显式模型检查问题,即状态爆炸问题变得更加严重。本文提出了一个概念,通过在状态表示中使用3值逻辑来解决这些困难,并在目标微控制器执行逻辑操作时显示其在状态空间节省方面的好处。为了强调这种方法的有效性,称为具有前瞻性的延迟不确定性,本文分析了典型微控制器源代码的嵌入式程序,并讨论了结果状态空间大小。所介绍的抽象技术在亚琛工业大学开发的[mc]方形模型检查器的MCS-51模拟器组件中实现。
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