Performance Assessment of an Efficient Search and Realization Technique of the S-Box in the AES Cryptosystem

Abstract

The speed and area performance of the byte-substitution (S-Box) impose a correlated impact on the speed and area of the Advanced Encryption System (AES) cryptosystem. In this paper, we present an efficient realization technique of the S-Box in the AES cryptosystem. We start by classifying the S-Box byte-substitution design techniques. We then provide a brief coverage of the hardware, software, and hybrid S-Box realization techniques. We then present an efficient S-Box realization technique that replaces the search needed in the 16 ×16 S-Box by four simpler searches two of them can be conducted in parallel and in a way that reduces the final search into searching within a set consisting of only four 2×2 cells which in turn leads to a faster search strategy. We also provide a simple hardware to carry out the search. A performance comparison among five realization techniques is conducted. The comparison is based in terms of the area (A) and the delay (T). It is shown that the technique due to Bertoni is the fastest followed by the technique due to Abd-El-Barr. In terms of area, it was found out that the technique due to Abd-El-Barr consumes the least area followed by the technique due to Canright. The technique due to Abd-El-Barr achieves the best normalized O(AT2) where A is the area and T is the critical path delay.