Application of a negative sweep voltage to control gate of fresh flash memory devices to facilitate threshold voltage test measurement

Abstract

The immediate threshold voltage (V/sub th/) measurements conducted on fresh flash memory devices gained no definite results: the obtained cell drain current (I/sub d/) versus applied gate voltage Old plots for the devices were oscillating and erratic. Suspected cause for this abnormal phenomenon arises from the random to-and-fro movements of the embedded positive charges present in the flash devices, across the reoxidized nitrided oxide (ONO) interpoly dielectric layer in the availability of electric fields. Application of a negative sweep voltage to the control gate of the fresh memory devices prior to the conduction of the V/sub th/ tests, however, seems to produce smooth I/sub d/ vs. V/sub g/ curve plots which yield repeatable as well as reasonable V/sub th/ values. The acquirement of such electrical results readily suggest the partial or full removal of the initial embedded positive charges, which were present in the devices as a result of charging from plasma exposure during the etching/implantation fabrication steps, by the applied gate potential.