{"title":"Hologram-based structural obfuscation for DSP cores","authors":"A. Sengupta, Mahendra Rathor","doi":"10.1049/pbcs067e_ch8","DOIUrl":null,"url":null,"abstract":"This chapter highlights an alternative paradigm for the design of structurally obfuscated digital signal processing (DSP) cores inspired by security hologram. Discussion on different structural-obfuscation techniques have been included in this chapter with emphasis on the algorithms used for obfuscation during design synthesis of high-level synthesis (HLS). The chapter is organized as follows: Section 8.1 introduces the importance of obfuscation for IP cores during the system-on-chip design process; Section 8.2 discusses the background on security hologram; Section 8.3 highlights the possible use of applying the hologram concept for structural obfuscation; Section 8.4 explains the hologram-based obfuscation methodology for DSP cores; Section 8.5 presents illustrative examples for hologram-based obfuscation on DSP cores; Section 8.6 discusses the process of determination of gate count for un-obfuscated and obfuscated designs; Section 8.7 presents a demonstration and examples of high-level transformation-based obfuscated DSP circuits; Section 8.8 presents design examples of un-obfuscated (baseline) DSP circuits; Section 8.9 presents analysis on case studies; Section 8.10 concludes the chapter.","PeriodicalId":12559,"journal":{"name":"Frontiers in Securing IP Cores: Forensic detective control and obfuscation techniques","volume":"47 1","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2019-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Frontiers in Securing IP Cores: Forensic detective control and obfuscation techniques","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/pbcs067e_ch8","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This chapter highlights an alternative paradigm for the design of structurally obfuscated digital signal processing (DSP) cores inspired by security hologram. Discussion on different structural-obfuscation techniques have been included in this chapter with emphasis on the algorithms used for obfuscation during design synthesis of high-level synthesis (HLS). The chapter is organized as follows: Section 8.1 introduces the importance of obfuscation for IP cores during the system-on-chip design process; Section 8.2 discusses the background on security hologram; Section 8.3 highlights the possible use of applying the hologram concept for structural obfuscation; Section 8.4 explains the hologram-based obfuscation methodology for DSP cores; Section 8.5 presents illustrative examples for hologram-based obfuscation on DSP cores; Section 8.6 discusses the process of determination of gate count for un-obfuscated and obfuscated designs; Section 8.7 presents a demonstration and examples of high-level transformation-based obfuscated DSP circuits; Section 8.8 presents design examples of un-obfuscated (baseline) DSP circuits; Section 8.9 presents analysis on case studies; Section 8.10 concludes the chapter.