Hologram-based structural obfuscation for DSP cores

A. Sengupta, Mahendra Rathor
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Abstract

This chapter highlights an alternative paradigm for the design of structurally obfuscated digital signal processing (DSP) cores inspired by security hologram. Discussion on different structural-obfuscation techniques have been included in this chapter with emphasis on the algorithms used for obfuscation during design synthesis of high-level synthesis (HLS). The chapter is organized as follows: Section 8.1 introduces the importance of obfuscation for IP cores during the system-on-chip design process; Section 8.2 discusses the background on security hologram; Section 8.3 highlights the possible use of applying the hologram concept for structural obfuscation; Section 8.4 explains the hologram-based obfuscation methodology for DSP cores; Section 8.5 presents illustrative examples for hologram-based obfuscation on DSP cores; Section 8.6 discusses the process of determination of gate count for un-obfuscated and obfuscated designs; Section 8.7 presents a demonstration and examples of high-level transformation-based obfuscated DSP circuits; Section 8.8 presents design examples of un-obfuscated (baseline) DSP circuits; Section 8.9 presents analysis on case studies; Section 8.10 concludes the chapter.
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基于全息图的DSP核结构混淆
本章重点介绍了受安全全息图启发的结构模糊数字信号处理(DSP)核心设计的另一种范例。本章讨论了不同的结构混淆技术,重点讨论了高级合成(HLS)设计合成过程中用于混淆的算法。本章组织如下:8.1节介绍了在片上系统设计过程中IP核混淆的重要性;第8.2节讨论了安全全息图的背景;第8.3节强调了应用全息图概念进行结构混淆的可能用途;第8.4节解释了基于全息图的DSP核心混淆方法;第8.5节给出了基于DSP内核的全息混淆的说明性示例;第8.6节讨论了确定未混淆和混淆设计的门数的过程;第8.7节给出了基于高级变换的模糊DSP电路的演示和示例;第8.8节给出了未混淆(基线)DSP电路的设计示例;第8.9节为个案分析;第8.10节结束本章。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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