M. Pandey, Shwetank Shekhar, Joginder Singh, G. Agarwal, Nitin Saxena
{"title":"A novel approach for USB2.0 validation on System on Chip","authors":"M. Pandey, Shwetank Shekhar, Joginder Singh, G. Agarwal, Nitin Saxena","doi":"10.1109/ICCCNT.2013.6726615","DOIUrl":null,"url":null,"abstract":"In peripheral to peripheral communication, USB2.0 continues to occupy prominent position. With the emergence of USB2.0 peripherals, figuring out a standard, reliable and robust approach that can validate USB2.0 on System on Chip (SoC) is the need of an hour. The performance of USB depends fundamentally on electrical characteristics. Using this innovative approach (validation using U-Boot framework) we have root-caused several notorious issues which were hard to narrow down using legacy approach. This methodology possesses both the legacy capability of low level programming (JTAG) as well as of application level (High Level) programming (Linux). The paper is presented using case study of some issues which were reflected in the system using this methodology only.","PeriodicalId":6330,"journal":{"name":"2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2013-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCNT.2013.6726615","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In peripheral to peripheral communication, USB2.0 continues to occupy prominent position. With the emergence of USB2.0 peripherals, figuring out a standard, reliable and robust approach that can validate USB2.0 on System on Chip (SoC) is the need of an hour. The performance of USB depends fundamentally on electrical characteristics. Using this innovative approach (validation using U-Boot framework) we have root-caused several notorious issues which were hard to narrow down using legacy approach. This methodology possesses both the legacy capability of low level programming (JTAG) as well as of application level (High Level) programming (Linux). The paper is presented using case study of some issues which were reflected in the system using this methodology only.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
