A composite insulator structure for VLSI multilevel metallization

Abstract

Dense and complex circuit layouts in integrated circuits often require multilevel interconnecting wiring. At IBM East Fishkill sputtered SiO₂ is used to provide insulation between the wiring levels. Defects in the insulating layers can result in interlevel shorts (ILS). If a projection from one metal layer is inadequately covered with the insulator it may short to the metal layer above. Since the inadequacy of coverage is a result of the non-conformal coating that results from sputter deposition, a relatively thin layer of conformal PECVD Si_xN_y deposited upon the top of the SiO₂ will provide adequate insulation over projections. Electrical testing of special test patterns showed significant improvement in ILS using the structure described.