Implementation of a FIR filter model using reversible Fredkin Gate

Abstract

Man has achieved wonders in his race from the stone age to the supersonic age. These wonders can be understood from the modern technologies. Technological advancements are becoming a part and parcel of this world. More and more technologies with lot of features and advantages are arising. Reversible logic is one such emerging concept. One of the main characteristics of reversible circuits is their less power consumption. As the technology improves, the number of components and hence the number of transistors packed on to the chip also increases. This causes increase in power consumption. Hence reduced power consumption argued by the reversible logic concept has adequate importance in the present scenario. Reversible logic has a wide application in low power VLSI circuits. This paper aims at promoting the concept of reversible logic by implementing a model of a FIR filter using the reversible Fredkin gate.