AutoMapper: an automated tool for optimal hardware resource allocation for networking applications on FPGA (abstract only)

Swapnil Haria, V. Prasanna
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Abstract

It has now become imperative for routers to support complicated lookup schemes, based on the specific function of the networking hardware. It is no longer possible to ensure an optimal resource utilization using manual organization techniques due to the increasing complexity of lookup schemes, as well as the large number of potential implementation choices. We have developed an automated tool, AutoMapper, which can map lookup schemes onto a particular target architecture optimally, thereby providing a superior alternative to the time-consuming and resource inefficient technique of manual conversion. It is based on an Integer Linear Programming (ILP) formulation that is able to allocate the limited hardware resources for a single lookup scheme, while optimizing any of the three performance metrics of latency, throughput or power consumption. Accurate formulation of the objective function and the constraint equations guarantee optimality in terms of the chosen performance metric. We demonstrate the operation of the developed tool, by successfully mapping complex real world lookup schemes onto a state-of-the art FPGA device, with execution times being under a second on a dual-core computer with 4 GB of RAM, running at 2.40 GHz.
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AutoMapper:为FPGA上的网络应用提供最佳硬件资源分配的自动化工具(仅抽象)
现在,基于网络硬件的特定功能,路由器必须支持复杂的查找方案。由于查找方案的复杂性日益增加,以及大量潜在的实现选择,使用手动组织技术来确保最佳的资源利用已不再可能。我们已经开发了自动化工具AutoMapper,它可以将查找方案最佳地映射到特定的目标体系结构上,从而为耗时且资源效率低下的手动转换技术提供了一种优越的替代方案。它基于整数线性规划(ILP)公式,能够为单个查找方案分配有限的硬件资源,同时优化延迟、吞吐量或功耗这三个性能指标中的任何一个。目标函数和约束方程的精确表述保证了所选性能指标的最优性。我们演示了开发的工具的操作,通过成功地将复杂的现实世界查找方案映射到最先进的FPGA设备上,在具有4 GB RAM的双核计算机上执行时间不到一秒,运行频率为2.40 GHz。
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FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022 HBM Connect: High-Performance HLS Interconnect for FPGA HBM. AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs. FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28 - March 2, 2021 FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020
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