Thermal Implications of On-Chip Voltage Regulation: Upcoming Challenges and Possible Solutions

Abstract

The primary objective of this paper is to investigate and evaluate the thermal implications of high power density on-chip voltage regulators. This paper is a first attempt to highlight the importance of the number, size, and location of on-chip voltage regulators on the thermal hotspots and thermal gradient. The physical location of on-chip voltage regulators is explored to distribute the hotspot locations and achieve spatial low pass filtering of the hotspots. A new thermal-aware physical design and power management technique are proposed to spatially and temporally distribute the hotspot locations over the cooler areas within an integrated circuit. The proposed technique eliminates the thermal gradient due to on-chip voltage regulators without any performance loss.