{"title":"非总线硬件IP自动集成到供软件使用的soc平台","authors":"Robert Günzel","doi":"10.1109/EUC.2008.140","DOIUrl":null,"url":null,"abstract":"The integration of heterogeneous intellectual property hardware (IP) into existing hardware platforms is often only considered with respect to IP cores that provide bus interfaces to their environment. This paper will show that there is a need for, and an advantage to be gained from, incorporating non-bus interface IP so that they can be used by software running on the platformpsilas processor(s). This paper presents a grammar with which services of non-bus interface cores can be described. The paper will show how this description can be used to generate adapters to integrate the IP as well as device drivers to use the IP. Experiments show how the use of this description can reduce the integration effort of non-bus interface cores.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Automatic Integration of Non-Bus Hardware IP into SoC-Platforms for Use by Software\",\"authors\":\"Robert Günzel\",\"doi\":\"10.1109/EUC.2008.140\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The integration of heterogeneous intellectual property hardware (IP) into existing hardware platforms is often only considered with respect to IP cores that provide bus interfaces to their environment. This paper will show that there is a need for, and an advantage to be gained from, incorporating non-bus interface IP so that they can be used by software running on the platformpsilas processor(s). This paper presents a grammar with which services of non-bus interface cores can be described. The paper will show how this description can be used to generate adapters to integrate the IP as well as device drivers to use the IP. Experiments show how the use of this description can reduce the integration effort of non-bus interface cores.\",\"PeriodicalId\":430277,\"journal\":{\"name\":\"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-12-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EUC.2008.140\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUC.2008.140","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Automatic Integration of Non-Bus Hardware IP into SoC-Platforms for Use by Software
The integration of heterogeneous intellectual property hardware (IP) into existing hardware platforms is often only considered with respect to IP cores that provide bus interfaces to their environment. This paper will show that there is a need for, and an advantage to be gained from, incorporating non-bus interface IP so that they can be used by software running on the platformpsilas processor(s). This paper presents a grammar with which services of non-bus interface cores can be described. The paper will show how this description can be used to generate adapters to integrate the IP as well as device drivers to use the IP. Experiments show how the use of this description can reduce the integration effort of non-bus interface cores.