Signal Integrity Issues in FPGA based multi-motor microstepping Drives

Stepper motors are widely used in precise positioning applications because of their ease of use, open loop control, almost constant torque output throughout the operating range and simplified control circuitry. A lot of improvement has been done in drive schemes of these stepper motors; implementation of microstepping to improve positional accuracy and to reduce disturbance torque in compared to full step; Pulse Width Modulation (PWM) mode of current control to counter back Electro-Motive-Force (EMF) voltage loss etc. In microstepping mode, stepper motor is driven with quantized sine and cosine currents. Due to these varying current generations, signal integrity issues within its own circuitry as well as to the neighboring circuits come to forefront. This paper describes PWM mode of microstepping drive using Field Programmable Gate Array (FPGA), N-MOSFET (Metal-Oxide- Semiconductor-Field-Effect-Transistor) & MOSFET drivers, signal integrity issues observed during motor operations & high current switching and best practices to tackle these issues. Logic signals are generated in FPGA. Microstepping current amplitude values are stored in PROM which are being accessed by FPGA and written to DAC for voltage reference. This paper presents the design, layout implementation, analysis, signal integrity issues, mitigation techniques and experimental results of multiple motor drives.